
# For BCU1525 Only! DDR4 UDIMM 64-bit, rank 1.

set_property -dict {PACKAGE_PIN D36 IOSTANDARD LVCMOS12 DRIVE 8} [get_ports C2_DDR4_0_reset_n]

set_property -dict {PACKAGE_PIN D33 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_ba[0]]
set_property -dict {PACKAGE_PIN B36 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_ba[1]]
set_property -dict {PACKAGE_PIN C31 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_bg[0]]
set_property -dict {PACKAGE_PIN J30 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_bg[1]]
set_property -dict {PACKAGE_PIN G30 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_cke[0]]
set_property -dict {PACKAGE_PIN E33 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_odt[0]]
set_property -dict {PACKAGE_PIN B35 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_cs_n[0]]
set_property -dict {PACKAGE_PIN B34 IOSTANDARD DIFF_SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_ck_c[0]]
set_property -dict {PACKAGE_PIN C34 IOSTANDARD DIFF_SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_ck_t[0]]

set_property -dict {PACKAGE_PIN B31 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_act_n]
set_property -dict {PACKAGE_PIN L29 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[0]]
set_property -dict {PACKAGE_PIN A33 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[1]]
set_property -dict {PACKAGE_PIN C33 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[2]]
set_property -dict {PACKAGE_PIN J29 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[3]]
set_property -dict {PACKAGE_PIN H31 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[4]]
set_property -dict {PACKAGE_PIN G31 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[5]]
set_property -dict {PACKAGE_PIN C32 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[6]]
set_property -dict {PACKAGE_PIN B32 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[7]]
set_property -dict {PACKAGE_PIN A32 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[8]]
set_property -dict {PACKAGE_PIN D31 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[9]]
set_property -dict {PACKAGE_PIN A34 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[10]]
set_property -dict {PACKAGE_PIN E31 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[11]]
set_property -dict {PACKAGE_PIN M30 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[12]]
set_property -dict {PACKAGE_PIN F33 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[13]]
set_property -dict {PACKAGE_PIN A35 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[14]]
set_property -dict {PACKAGE_PIN G32 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[15]]
set_property -dict {PACKAGE_PIN K30 IOSTANDARD SSTL12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST} [get_ports C2_DDR4_0_adr[16]]

set_property -dict {PACKAGE_PIN P29 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[0]]
set_property -dict {PACKAGE_PIN P30 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[1]]
set_property -dict {PACKAGE_PIN R30 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[2]]
set_property -dict {PACKAGE_PIN N29 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[3]]
set_property -dict {PACKAGE_PIN N32 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[4]]
set_property -dict {PACKAGE_PIN M32 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[5]]
set_property -dict {PACKAGE_PIN P31 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[6]]
set_property -dict {PACKAGE_PIN L32 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[7]]
set_property -dict {PACKAGE_PIN H29 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[8]]
set_property -dict {PACKAGE_PIN G29 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[9]]
set_property -dict {PACKAGE_PIN J28 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[10]]
set_property -dict {PACKAGE_PIN H28 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[11]]
set_property -dict {PACKAGE_PIN K27 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[12]]
set_property -dict {PACKAGE_PIN L27 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[13]]
set_property -dict {PACKAGE_PIN K26 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[14]]
set_property -dict {PACKAGE_PIN K25 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[15]]
set_property -dict {PACKAGE_PIN P25 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[16]]
set_property -dict {PACKAGE_PIN R25 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[17]]
set_property -dict {PACKAGE_PIN L25 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[18]]
set_property -dict {PACKAGE_PIN M25 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[19]]
set_property -dict {PACKAGE_PIN P26 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[20]]
set_property -dict {PACKAGE_PIN R26 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[21]]
set_property -dict {PACKAGE_PIN N27 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[22]]
set_property -dict {PACKAGE_PIN N28 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[23]]
set_property -dict {PACKAGE_PIN F27 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[24]]
set_property -dict {PACKAGE_PIN D28 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[25]]
set_property -dict {PACKAGE_PIN E27 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[26]]
set_property -dict {PACKAGE_PIN E28 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[27]]
set_property -dict {PACKAGE_PIN G26 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[28]]
set_property -dict {PACKAGE_PIN F29 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[29]]
set_property -dict {PACKAGE_PIN G27 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[30]]
set_property -dict {PACKAGE_PIN F28 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[31]]
set_property -dict {PACKAGE_PIN A38 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[32]]
set_property -dict {PACKAGE_PIN A37 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[33]]
set_property -dict {PACKAGE_PIN B37 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[34]]
set_property -dict {PACKAGE_PIN C36 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[35]]
set_property -dict {PACKAGE_PIN B40 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[36]]
set_property -dict {PACKAGE_PIN C39 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[37]]
set_property -dict {PACKAGE_PIN A40 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[38]]
set_property -dict {PACKAGE_PIN D39 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[39]]
set_property -dict {PACKAGE_PIN G36 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[40]]
set_property -dict {PACKAGE_PIN H36 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[41]]
set_property -dict {PACKAGE_PIN H37 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[42]]
set_property -dict {PACKAGE_PIN J36 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[43]]
set_property -dict {PACKAGE_PIN G34 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[44]]
set_property -dict {PACKAGE_PIN G35 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[45]]
set_property -dict {PACKAGE_PIN K37 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[46]]
set_property -dict {PACKAGE_PIN K38 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[47]]
set_property -dict {PACKAGE_PIN E38 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[48]]
set_property -dict {PACKAGE_PIN D38 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[49]]
set_property -dict {PACKAGE_PIN E35 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[50]]
set_property -dict {PACKAGE_PIN F35 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[51]]
set_property -dict {PACKAGE_PIN E36 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[52]]
set_property -dict {PACKAGE_PIN E37 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[53]]
set_property -dict {PACKAGE_PIN F38 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[54]]
set_property -dict {PACKAGE_PIN G38 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[55]]
set_property -dict {PACKAGE_PIN K35 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[56]]
set_property -dict {PACKAGE_PIN J35 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[57]]
set_property -dict {PACKAGE_PIN K33 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[58]]
set_property -dict {PACKAGE_PIN L33 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[59]]
set_property -dict {PACKAGE_PIN J33 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[60]]
set_property -dict {PACKAGE_PIN J34 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[61]]
set_property -dict {PACKAGE_PIN N34 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[62]]
set_property -dict {PACKAGE_PIN P34 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dq[63]]

set_property -dict {PACKAGE_PIN M31 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_c[0]]
set_property -dict {PACKAGE_PIN N31 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_t[0]]
set_property -dict {PACKAGE_PIN J26 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_c[1]]
set_property -dict {PACKAGE_PIN J25 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_t[1]]
set_property -dict {PACKAGE_PIN M26 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_c[2]]
set_property -dict {PACKAGE_PIN N26 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_t[2]]
set_property -dict {PACKAGE_PIN D30 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_c[3]]
set_property -dict {PACKAGE_PIN D29 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_t[3]]
set_property -dict {PACKAGE_PIN A39 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_c[4]]
set_property -dict {PACKAGE_PIN B39 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_t[4]]
set_property -dict {PACKAGE_PIN H38 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_c[5]]
set_property -dict {PACKAGE_PIN J38 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_t[5]]
set_property -dict {PACKAGE_PIN E40 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_c[6]]
set_property -dict {PACKAGE_PIN E39 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_t[6]]
set_property -dict {PACKAGE_PIN L36 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_c[7]]
set_property -dict {PACKAGE_PIN L35 IOSTANDARD DIFF_POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dqs_t[7]]

set_property -dict {PACKAGE_PIN T30 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dm_n[0]]
set_property -dict {PACKAGE_PIN M27 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dm_n[1]]
set_property -dict {PACKAGE_PIN R28 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dm_n[2]]
set_property -dict {PACKAGE_PIN H26 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dm_n[3]]
set_property -dict {PACKAGE_PIN C37 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dm_n[4]]
set_property -dict {PACKAGE_PIN H33 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dm_n[5]]
set_property -dict {PACKAGE_PIN G37 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dm_n[6]]
set_property -dict {PACKAGE_PIN M34 IOSTANDARD POD12_DCI OUTPUT_IMPEDANCE RDRV_40_40 SLEW FAST IBUF_LOW_PWR FALSE ODT RTT_40 EQUALIZATION EQ_LEVEL2 PRE_EMPHASIS RDRV_240} [get_ports C2_DDR4_0_dm_n[7]]

#300MHz clock
set_property -dict {PACKAGE_PIN F32  IOSTANDARD DIFF_SSTL12} [get_ports dimm2_refclk_clk_p]
set_property -dict {PACKAGE_PIN E32  IOSTANDARD DIFF_SSTL12} [get_ports dimm2_refclk_clk_n]

